Physical Layer Chips

Quake Technologies Inc., a fabless semiconductor start-up, announced today that it is developing two revolutionary physical- (PHY) layer chips for high-speed optical networking applications. Samples of both products are now available. Shipping of production volumes will start in the fourth quarter of 2001.

System-friendly integration promises few interfaces to worry about within the system, smaller footprint, reduced power consumption and improved economics.

The QT2010 consumes a very low 2.2W of power from a single 3.3V supply. The QT2010 offers SONET-compliant jitter performance and a high level of system-friendly integration within a compact plastic ball grid array package.

The QT2010 contains the following key features:

• a multiplexer (MUX) for combining several signals for transmission over a single medium;
• demultiplexer (DEMUX) for completing the multiplexing process by separating multiplexed signals from a transmission line;
• clock and data recover (CDR);
• an on-chip phase-lock-loop (PLL);
• a programmable transmit clock and data phase aligner;
• a clock input frequency; and
• an internal serial loopback for diagnostic test.

The QT1090 preamplifier is an integrated transimpedance-limiting amplifier, designed for fiber optic local area network (LAN), metropolitan area network (MAN), and wide area network (WAN) applications. Created to perform at high speed, this device boasts data rate capabilities in the 9.953 to 10.7 Gb/s range with a very low 170mW power consumption, making it ideal for applications such as SONET/SDH or 10 Gigabit Ethernet.

Together, the QT2010 and QT1090 two-chip PHY solution requires a single 3.3V supply and consumes less than 2.5W.

Quake is following the standards for product development and supply set out by the International Organization for Standardization (ISO) and will comply with the ISO standards by end of 2001.

Quake Technologies, 1335 Carling Avenue Suite 101, Ottawa , ON K1Z 8N8. Tel: 613-724-6651; Fax: 613-724-6683.