Product/Service

Packet Forwarding Engine

Source: SiberCore America, Inc.
This Packet Forwarding Engine, the SiberCAM Ultra-2M, is based on an advanced Ternary Content Addressable Memory (T-CAM) architecture
SiberCore America, Inc. Forwarding Engine, the SiberCAM Ultra-2M, is based on an advanced Ternary Content Addressable Memory (T-CAM) architecture, the SiberCAM Ultra-2M performs up to 100 million multi-layer, multi-protocol look-ups per second. The SiberCAM Ultra-2M can support OC-768 (40 Gbit/s) as well as OC-192 (10 Gbit/s) and OC-48 (2.4 Gbit/s) transmission systems. Applications for the SiberCAM Ultra-2M include multi-gigabit/terabit routers and high-performance, multi-layer Ethernet switches.

Based on a new Ternary CAM architecture, each Ultra-2M device can hold 64K Layer 3 (IPv4) addresses - at least twice the capacity of the highest density competing CAM. Sixteen Ultra-2M's can be cascaded together to support over one million IPv4 addresses in a single routing sub-system, with no search throughput performance penalty. This memory density and wire-speed forwarding at OC-192 and OC-768 rates is critical to sustaining the exponential growth of the Internet.

These forwarding engines use a programmable search comparand input port and a fixed length pipelined architecture to deliver one search result per clock cycle for 36-, 72-, and 144- bit addresses and one search result per two clock cycles for 288-bit addresses. With clock speeds as high as 100 MHz, Ultra-2M devices can process over one hundred million packets per second.

This makes them ideal for multiple OC-192 and single OC-768 look-ups in terabit routers, as well as for multi-layer multi-protocol support in gigabit and 10 gigabit enterprise LAN switches.
The 32-bit Layer 3 IPv4 addresses are likely to predominate in the near term, but will be interspersed with 128-bit IPv6 addresses. The Ultra-2M is the only ternary CAM-based solution that permits each entry to be dynamically and individually tagged as either 36-, 72-, 144- or 288-bits wide to support multiple types of look-ups within the same chip without restriction as to the ratio of the entry types. This capability ensures that the entire memory is fully utilized.

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