Network Processor Chip Set & Software

The "PayloadPlus" solution includes a 2.5 gigabit-per-second (Gbit/s) OC-48c network processor chip set and software. The network processor solution provides hardware and software for next-generation, higher-performance Internet infrastructure. The highly programmable, OC-48c (2.5 Gbit/s) network processors can enable datacom and telecom equipment manufacturers to build flexible infrastructure equipment, in-turn allowing service providers to introduce new services and billing arrangements in less time.

The chipset consists of three chips: the Fast Pattern Processor (FPP), the Routing Switch Processor (RSP) and the Agere System Interface (ASI).

The FPP performs wire-speed recognition, classification and reassembly of incoming packet data, then passes the packets and routing/switching conclusions to the RSP, which performs wire-speed queuing, traffic management, traffic shaping, packet modification and segmentation. The FPP and RSP interface to a system processor via the ASI. The network processors use Agere's Functional Programming Language (FPL), a high-level programming language designed specifically for communication applications. FPL is intuitive, compact and easy to learn, and can enable the development and deployment of software in less time.

Lucent Technologies Microelectronics Group, 283 King George Road, New Jersey, NJ 07059. Tel: 908-559-6035; Fax: 908-559-1124.