Gigabit Ethernet Transceiver
The device performs the data serialization, deserialization, and clock extraction functions for a physical layer interface device. The transceiver operates at 1.25 Gbps (typical) providing up to 1 Gbps of data bandwidth over a copper or optical media interface. It supports both the defined 10-bit interface (TBI) and a reduced 5-bit interface utilizing double data rate (DDR) clocking.
It is housed in a thermally enhanced, 64-pin VQFP PowerPAD package. It is recommended that the package be soldered to the thermal land on the board. The device is characterized for operation from 0°C to 70°C. It uses a 2.5-V supply. The I/O section is 3.3-V compatible. It is designed to be hot plug capable. A power-on reset causes RCB0, RCB1, the parallel output signal terminals, TXP, and TXN to be held in high-impedance state.
Features
1 to 1.6 Gigabits Per Second (Gbps) Serializer/Deserializer
Low Power Consumption <200 mW at 1.25 Gbps
LVPECL Compatible Differential I/O on High Speed Interface
Receiver Differential Input Thresholds 200 mV Minimum
IEEE 802.3 Gigabit Ethernet Compliant
Advanced 0.25 um CMOS Technology
No External Filter Capacitors Required
Comprehensive Suite of Built-In Testability
IEEE 1149.1 JTAG port is supported
Texas Instruments, P. O. Box 954, Santa Clara, CA 91380. Tel: 1-800-477-8924; Fax: 214-480-7800.